The systems that need Functional Safety Verification are located in several places:
Functional Safety Verification is a process in which the potential hazardous events are identified and included in the verification plan, and then tested on the DUT by random error/hazard injection.
The safety requirement specification will also be included in the verification plan. This will tell the verification engineer what is the accepted behaviour for each type of hazard.
The safety verification is best done with dedicated tools like the Cadence Functional Safety Simulator which are able to inject errors and collect information about the DUT behaviour for each error.
In the safety simulations, the SPICE models can be replaced with behavioral models in order to speed-up the simulations.
We provide all the services required to perform the safety verification for the automotive chips.
TrustIC safety verification solution also includes a library of behavioral models to be used in mixed-signal simulations, with tools like Xcelium from Cadence.